Loading...
Please wait, while we are loading the content...
High-k Film Apparatus and Method
| Content Provider | The Lens |
|---|---|
| Abstract | A device may include: a high-k layer disposed on a substrate and over a channel region in the substrate. The high-k layer may include a high-k dielectric material having one or more impurities therein, and the one or more impurities may include at least one of C, Cl, or N. The one or more impurities may have a molecular concentration of less than about 50%. The device may further include a cap layer over the high-k layer over the channel region, the high-k layer separating the cap layer and the substrate. |
| Related Links | https://www.lens.org/lens/patent/011-987-129-127-06X/frontpage |
| Language | English |
| Publisher Date | 2019-05-23 |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Patent |
| Jurisdiction | United States of America |
| Date Applied | 2019-01-07 |
| Applicant | Taiwan Semiconductor Mfg Co Ltd |
| Application No. | 201916241560 |
| Claim | A method, comprising: forming a source region and a drain region in a substrate; and forming a gate stack disposed between the source region and the drain region, the gate stack comprising a high-k dielectric layer disposed over the substrate, a conductive cap layer disposed over the high-k dielectric layer, and a gate electrode disposed over the conductive cap layer, wherein the high-k dielectric layer comprises one or more impurities selected from C, Cl, or N, the one or more impurities further comprising F, wherein a molecular concentration of the one or more impurities is below about 50%, and wherein an atomic concentration of the F in a topmost 1 to 10 nm of the high-k layer is greater than an atomic concentration of one of the C, the Cl, and the N in the topmost 1 to 10 nm of the high-k layer. The method of claim 1 , further comprising forming sidewall spacers disposed laterally adjacent to the gate stack. The method of claim 1 , wherein forming the gate stack comprises depositing the conductive cap layer over the high-k dielectric layer using at least one of a physical vapor deposition process or an atomic layer deposition process. The method of claim 1 , wherein forming the gate stack comprises exposing the conductive cap layer to a plasma oxygen etch process prior to forming the gate electrode over the conductive cap layer. The method of claim 1 , wherein the high-k dielectric layer comprises a compound of hafnium. The method of claim 1 , wherein the gate stack further comprises an interfacial layer disposed between the conductive cap layer and the high-k dielectric layer. The method of claim 6 , wherein a thickness of the interfacial layer is in a range from about 5 Angstroms to about 25 Angstroms. A method of forming a device, the method comprising: depositing a hafnium-containing layer over a channel region of a substrate; forming a conductive cap layer over the hafnium-containing layer, wherein each of the hafnium-containing layer and the conductive cap layer comprise one or more impurities; exposing the conductive cap layer to a reactive plasma treatment process, the reactive plasma treatment process reducing a concentration of the one or more impurities in the conductive cap layer and the hafnium-containing layer; and plasma oxygen etching the conductive cap layer, wherein the plasma oxygen etching is performed separately from the reactive plasma treatment process. The method of claim 8 , wherein the one or more impurities comprise at least one of carbon, chlorine, or nitrogen. The method of claim 8 , wherein the reactive plasma treatment process comprises a dry plasma treatment using a material comprising one of chlorine, fluorine or oxygen. The method of claim 8 , wherein the conductive cap layer and the hafnium-containing layer differ in composition. |
| CPC Classification | Semiconductor Devices Not Covered By Class H10 |
| Extended Family | 026-564-069-137-249 011-987-129-127-06X 155-712-458-891-500 146-115-891-049-232 145-223-480-311-664 064-673-000-830-775 |
| Patent ID | 20190157415 |
| Inventor/Author | Chang Che-cheng Chen Yi-ren Chen Chang-yin Chen Yi-jen Zhu Ming Chang Yung-jung Chuang Harry-hak-lay |
| IPC | H01L29/51 H01L21/02 H01L21/28 H01L21/285 H01L21/321 H01L21/3213 H01L29/40 H01L29/423 H01L29/49 H01L29/66 H01L29/78 |
| Status | Inactive |
| Simple Family | 026-564-069-137-249 011-987-129-127-06X 155-712-458-891-500 146-115-891-049-232 145-223-480-311-664 064-673-000-830-775 |
| CPC (with Group) | H01L21/28185 H01L21/0234 H01L21/321 H01L21/02181 H01L21/32136 H10D64/01 H10D64/667 H10D64/685 H10D64/691 H10D30/0223 H10D30/027 H10D30/60 H10D64/021 H10D64/514 H01L21/28158 H01L21/2855 H01L21/28556 |
| Issuing Authority | United States Patent and Trademark Office (USPTO) |
| Kind | Patent Application Publication |
