Voltage Regulator Including A Non-regulated State Detection Circuit

Content Provider	The Lens
Abstract	Provided is a voltage regulator capable of stably suppressing overshoot. The voltage regulator includes a non-regulated state detection circuit for detecting a non-regulated state, and an overshoot suppression circuit. The overshoot suppression circuit is configured to operate when the non-regulated state detection circuit detects the non-regulated state.
Related Links	https://www.lens.org/lens/patent/011-404-281-670-553/frontpage
Language	English
Publisher Date	2019-01-08
Access Restriction	Open
Content Type	Text
Resource Type	Patent
Jurisdiction	United States of America
Date Applied	2015-12-15
Agent	Brinks Gilson & Lione
Applicant	Ablic Inc
Application No.	201514969688
Claim	A voltage regulator, comprising: a first differential amplifier circuit having a first input connected to a voltage divider and a second Input connected to a reference voltage circuit and configured to compare a feedback voltage obtained by dividing an output voltage of an output terminal and a first reference voltage to each other and to control an output transistor, an overshoot suppression circuit connected to the first and second Inputs of the first differential amplifier circuit and configured to suppress an overshoot of the output voltage; and a non-regulated state detection circuit configured to detect a non-regulated state based on a gate voltage of the output transistor and outputs a detection voltage to the overshoot suppression circuit, wherein the overshoot suppression circuit is configured to suppress the overshoot of the output voltage when the non-regulated state detection circuit detects the non-regulated state to detect the overshoot. A voltage regulator according to claim 1 , wherein the non-regulated state detection circuit comprises: a first comparator for comparing the gate voltage of the output transistor and a second reference voltage to each other; a second comparator for comparing the gate voltage of the output transistor and a third reference voltage to each other; and a first logic circuit for outputting an OR of a detection signal of the first comparator and a detection signal of the second comparator. A voltage regulator according to claim 2 , wherein the overshoot suppression circuit comprises: a second differential amplifier circuit for detecting the overshoot of the output voltage; a second logic circuit for outputting an AND of a detection signal of the second differential amplifier circuit and a detection signal of the non-regulated state detection circuit; and a transistor for controlling the gate voltage of the output transistor based on an output signal of the second logic circuit. A voltage regulator, comprising: a first differential amplifier circuit configured to compare a feedback voltage obtained by dividing an output voltage of an output terminal and a first reference voltage to each other and to control an output transistor, an overshoot suppression circuit configured to suppress an overshoot of the output voltage; and a non-regulated state detection circuit configured to detect a non-regulated state based on a gate voltage of the output transistor and including a first comparator for comparing the gate voltage of the output transistor and a second reference voltage to each other, a second comparator for comparing the gate voltage of the output transistor and a third reference voltage to each other, and a first logic circuit for outputting an OR of a detection signal of the first comparator and a detection signal of the second comparator, wherein the overshoot suppression circuit is configured to suppress the overshoot of the output voltage when the non-regulated state detection circuit detects the non-regulated state to detect the overshoot.
CPC Classification	SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES APPARATUS FOR CONVERSION BETWEEN AC AND AC; BETWEEN AC AND DC; OR BETWEEN DC AND DC; AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS;CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER;CONTROL OR REGULATION THEREOF
Examiner	Jue Zhang Jye-june Lee
Extended Family	011-404-281-670-553 109-979-073-640-414 050-221-064-465-118 152-759-780-949-570 084-549-157-510-339 066-958-401-153-383 088-921-056-520-03X 005-407-408-265-165 188-991-982-587-902 149-810-383-748-233
Patent ID	10177655
Inventor/Author	Tsuzaki Toshiyuki Kurozo Tadashi Fujimura Manabu
IPC	H02M1/32 G05F1/571 G05F1/573 H02M3/158
Status	Active
Owner	Ablic Inc Seiko Instruments Inc
Simple Family	011-404-281-670-553 109-979-073-640-414 050-221-064-465-118 152-759-780-949-570 084-549-157-510-339 088-921-056-520-03X 066-958-401-153-383 005-407-408-265-165 188-991-982-587-902 149-810-383-748-233
CPC (with Group)	G05F1/573 G05F1/571 H02M3/158 H02M1/32
Issuing Authority	United States Patent and Trademark Office (USPTO)
Kind	Patent/New European patent specification (amended specification after opposition procedure)