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Frequency-tunable Frequency Source and System, Method and Electronic Apparatus Related Thereto
| Content Provider | The Lens |
|---|---|
| Abstract | The present disclosure relates to a frequency source with an adjustable frequency, and related system, method and electronic device, in particular to a frequency source with an adjustable frequency comprising an input terminal for receiving an input voltage signal, wherein the frequency source identifies a frequency of the input voltage signal. The present disclosure relates to a system comprising the frequency source, a method for identifying the frequency of the voltage signal, and an electronic device comprising the frequency source. |
| Related Links | https://www.lens.org/lens/patent/010-669-374-797-622/frontpage |
| Language | English |
| Publisher Date | 2019-11-13 |
| Access Restriction | Open |
| Alternative Title | Frequenzabstimmbare Frequenzquelle Und System, Verfahren Und Elektronische Vorrichtung Dazu Source De Fréquence Accordable En Fréquence Et Système, Procédé Et Appareil Électronique Associés |
| Content Type | Text |
| Resource Type | Patent |
| Date Applied | 2017-08-24 |
| Agent | Brötz, Helmut |
| Applicant | Boe Technology Group Co Ltd |
| Application No. | 17838113 |
| Claim | A frequency source with an adjustable frequency, comprises an input terminal for receiving an input voltage signal, and is configured to identify a frequency of the input voltage signal, and further comprises a time-average-frequency direct period synthesis TAF-DPS clock generator, wherein the TAF-DPS clock generator comprises: a first input terminal for receiving a base time unit Δ; a second input terminal for receiving a frequency/period control word F=I+r, where I is an integer, and 0 ≦ r <1; a direct period synthesis unit for creating a first period T A = I ∗ Δ and a second period T B = (I +1) ∗ Δ; an output terminal for outputting a clock signal formed by pulses with the first period T A and pulses with the second period T B in an interleaved manner, wherein possibilities of occurrence for the first period T A and the second period T B are controlled by a value of r, wherein a frequency and a period of the TAF-DPS clock generator is calculated as 1/f TAF = T TAF = F ∗ Δ, according to a time average frequency of the clock signal, and the control word F takes on a linear relationship with the period of the TAF-DPS clock generator. The frequency source according to claim 1, wherein the base time unit Δ is generated by a multi-stage voltage-controlled oscillator, wherein the multi-stage voltage-controlled oscillator is locked to a reference frequency through a phase-locked loop, so that a frequency f vco of the multi-stage voltage-controlled oscillator is a given value, and the multi-stage voltage-controlled oscillator outputs K signals of which phases are shift equably, where K is an integer greater than 1, and the base time unit Δ can be calculated as : wherein T VCO represents a period of the multi-stage voltage-controlled oscillator. The frequency source according to claim 1 or 2, wherein I and r are input by a user, wherein accuracy of the frequency of the TAF-DPS clock generator is associated with digits allocated to r. The frequency source according to claim 1 or 2, wherein the frequency source comprises a TAF-DPS vernier caliper, and the TAF-DPS vernier caliper comprises: a first TAF-DPS clock generator, used as a slow TAF-DPS clock generator, wherein the first TAF-DPS clock generator comprises a second input terminal for receiving a slow control word F slow , and a third input terminal for receiving a start signal of one pulse period of the input voltage signal, and is configured to output a slow clock signal at its output terminal; a second TAF-DPS clock generator, used as a fast TAF-DPS clock generator, wherein the second TAF-DPS clock generator comprises a second input terminal for receiving a fast control word F fast , and a third input terminal for receiving a stop signal of the pulse period of the input voltage signal, and is configured to output a fast clock signal at its output terminal; a phase detector, configured to detect a coincidence point of the slow clock signal and the fast clock signal, wherein edges of the slow clock signal and the fast clock signal are aligned at the coincidence point, and the phase detector comprises a first input terminal for receiving the slow clock signal, a second input terminal for receiving the fast clock signal, and an output terminal for outputting a reset signal when the coincidence point is detected; a first digital counter, comprising a clock input terminal for receiving the slow clock signal, a reset input terminal for receiving the reset signal from the phase detector, and an output terminal for outputting the slow clock signal stored in the first digital counter when the reset signal is received, wherein the number of iterations of the output slow clock signal is stored as a first digital value, and the first digital counter is reset after the stored slow clock signal is output; a second digital counter, comprising a clock input terminal for receiving the fast clock signal, a reset input terminal for receiving the reset signal from the phase detector, and an output terminal for outputting the fast clock signal stored in the second digital counter when the reset signal is received, wherein the number of iterations of the output fast clock signal is stored as a second digital value, and the second digital counter is reset after the stored fast clock signal is output; and a calculation module, configured to calculate a time of flight (TOF) between the start signal and the stop signal according to the first digital value and the second digital value, so as to obtain a period of the input voltage signa The frequency source according to claim 4, wherein the slow control word F slow =I, where I is an integer greater than or equal to 2, and the fast control word F fast =(I-1)+r. The frequency source according to claim 4, wherein the first TAF-DPS clock generator comprises: a first digital-controlled oscillator, configured to generate a slow base time unit Δ slow ; a first TAF-DPS frequency synthesizer, configured to output a slow TAF clock signal according to the slow control word F slow and the slow base time unit Δ slow obtained from the first digital-controlled oscillator. The frequency source according to claim 4, wherein the second TAF-DPS clock generator comprises: a second digital-controlled oscillator, configured to generate a fast base time unit Δ fast ; a second TAF-DPS frequency synthesizer, configured to output a fast TAF clock signal according to the fast control word F slow and the fast base time unit Δ fast obtained from the second digital-controlled oscillator; 1×PLL (a phase-locked loop whose frequency division ratio is 1), wherein 1×PLL represents a phase-locked loop whose frequency division ratio is 1, configured to receive the fast TAF clock signal from the second TAF-DPS frequency synthesizer as an input signal of the phase-locked loop, and output the slow clock signal as an output signal of the phase-locked loop according to the input signal of the phase-locked loop, wherein a frequency ratio of the input signal and the output signal is 1. The frequency source according to claim 1 or 2, wherein the frequency source comprises a frequency-locked loop constructed based on the TAF-DPS clock generator, wherein the input voltage signal is input to the frequency-locked loop as a reference signal, the reference signal is compared with a clock signal generated by the TAF-DPS clock generator in terms of frequency, and the control word F of the TAF-DPS clock generator is adjusted iteratively according to a comparison result until the frequency of the clock signal generated by the TAF-DPS clock generator is consistent with the frequency of the reference signal, so as to obtain the frequency of the reference signal according to the control word F. The frequency source according to claim 8, wherein the frequency-locked loop comprises: a frequency detector, a low-pass filter connected to the downstream of the frequency detector, and a TAF-DPS digital-controlled oscillator connected to the downstream of the low-pass filter. The frequency source according to claim 9, wherein the frequency detector is configured to detect a difference between a frequency f r of the reference signal input to the frequency detector and a frequency f o of an output signal of the frequency-locked loop, and output a difference variable; the low-pass filter is configured to generate a control variable used for the TAF-DPS digital-controlled oscillator at the downstream after performing low-pass filtering on the difference variable to remove a high frequency component, wherein the control variable comprises the control word F; the TAF-DPS digital-controlled oscillator is configured to generate the output signal with the frequency f o according to the control variable, wherein the output signal is delivered to the frequency detector. The frequency source according to claim 9, wherein the frequency-locked loop further includes a frequency divider connected between the TAF-DPS digital-controlled oscillator and the frequency detector. The frequency source according to claim 11, wherein, the frequency detector is configured to detect a difference between a frequency f r of the reference signal input to the frequency detector and a frequency f o ' of a signal from the frequency divider, and output a difference variable; the low-pass filter is configured to generate a control variable used for the TAF-DPS digital-controlled oscillator at the downstream after performing low-pass filtering on the difference variable to remove a high frequency component, wherein the control variable comprises the control word F; the TAF-DPS digital-controlled oscillator is configured to generate the output signal with the frequency f o according to the control variable; the frequency divider is configured to divide the frequency of the output signal with a factor of 1/N so as to generate a signal with the frequency f o ', and the signal with the frequency f o ' is delivered to the frequency detector, where N is an integer greater than or equal to 1. The frequency source according to claim 10 or 12, wherein both the difference variable and the control variable are digital values. A system for detecting a change in resistance and capacitance values of a resistive and capacitive sensing apparatus, comprising the frequency source according to any one of claims 1 to 13, the resistive and capacitive sensing apparatus and a comparison unit, wherein the resistive and capacitive sensing apparatus converts the resistance and capacitance values into a voltage signal, the frequency source identifies a frequency of the voltage signal, wherein the comparison unit compares the identified frequency with a frequency of a voltage signal of the resistive and capacitive sensing apparatus previously stored, and determines that there is a change in the resistance and capacitance values of the resistive and capacitive sensing apparatus if a change is determined by the comparison between the identified frequency with a frequency of a voltage signal of the resistive and capacitive sensing apparatus previously stored. The system according to claim 14, wherein the resistive and capacitive sensing apparatus is a relaxation oscillator, wherein the relaxation oscillator comprises an operational amplifier and a sensing capacitor connected to one input terminal of the operational amplifier, wherein the operational amplifier outputs a voltage signal having a frequency related to the resistance and capacitance values in the relaxation oscillator. A method for identifying a frequency of a voltage signal, wherein the voltage signal is input to the frequency source with an adjustable frequency according to any one of claims 1 to 13, and the frequency source identifies a frequency of the input voltage signal, comprising following steps: converting resistance and capacitance values into a voltage signal by a resistive and capacitive sensing apparatus; delivering the voltage signal to the frequency source with an adjustable frequency and identifying a frequency of the voltage signal by the frequency source with an adjustable frequency; determining whether there is a change by comparing the frequency of the voltage signal with a frequency of a voltage signal of the resistive and capacitive sensing apparatus previously stored; if there is a change, then it is determined that there is a change in the resistance and capacitance values. An electronic device comprising the frequency source comprising any one of claims 1 to 13. |
| CPC Classification | AUTOMATIC CONTROL; STARTING; SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES ELECTRIC DIGITAL DATA PROCESSING |
| Extended Family | 005-002-697-882-745 120-374-652-855-926 059-141-581-965-02X 039-823-657-159-933 199-594-420-929-210 010-669-374-797-622 143-842-330-560-278 |
| Patent ID | 3567726 |
| Inventor/Author | Xiu Liming |
| IPC | H03L7/18 |
| Status | Pending |
| Simple Family | 005-002-697-882-745 120-374-652-855-926 059-141-581-965-02X 039-823-657-159-933 199-594-420-929-210 010-669-374-797-622 143-842-330-560-278 |
| CPC (with Group) | H03L7/18 H03L7/085 H03L7/08 H03L7/0991 H03L7/16 G06F1/04 |
| Issuing Authority | United States Patent and Trademark Office (USPTO) |
| Kind | Patent Application Publication |